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library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity programa_helloworld is
port( address : in std_logic_vector(7 downto 0);
clk : in std_logic;
dout : out std_logic_vector(15 downto 0));
end;
architecture v1 of programa_helloworld is
constant ROM_WIDTH: INTEGER:= 16;
constant ROM_LENGTH: INTEGER:= 256;
subtype rom_word is std_logic_vector(ROM_WIDTH-1 downto 0);
type rom_table is array (0 to ROM_LENGTH-1) of rom_word;
constant rom: rom_table := rom_table'(
"1101100000000101",
"0100000101000000",
"0010000100000001",
"1101100000010010",
"1101000000000000",
"1000001000000000",
"0000101010000000",
"1101010100000101",
"1101100000100110",
"0000001100001001",
"1101100000011111",
"1010001000001110",
"1000000000000000",
"0000100010000000",
"0101001000000000",
"0011001100000001",
"1101010100001010",
"1001000000000000",
"0000000000000000",
"1000100000000000",
"1101100000011111",
"0000001100001000",
"1000100100000000",
"1101100000011111",
"1010000100001110",
"0011001100000001",
"1101010100010110",
"0000000011111111",
"1000100000000000",
"1101100000011111",
"1001000000000000",
"0000010000000011",
"0000010100100010",
"0011010100000001",
"1101010100100001",
"0011010000000001",
"1101010100100000",
"1001000000000000",
"0000010000000011",
"0000010100010000",
"0011010100000001",
"1101010100101000",
"0011010000000001",
"1101010100100111",
"1001000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
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"0000000000000000",
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"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000");
begin
process (clk)
begin
if clk'event and clk = '1' then
dout <= rom(conv_integer(address));
end if;
end process;
end v1;