Browse Source

RAM fixes, writestrobe and readstrobe already working OK. Picoblaze interface working

pull/2/head
Raniita 3 years ago
parent
commit
2707517f74
  1. 570
      assembly/programa_helloworld_int.vhd
  2. 5
      assembly/programa_vga_rs232.asm
  3. 2
      fuseRelaunch.cmd
  4. 20
      netgen/synthesis/toplevel_synthesis.nlf
  5. 7576
      netgen/synthesis/toplevel_synthesis.vhd
  6. 97
      pico.wcfg
  7. 8
      picoblaze.xise
  8. 570
      programa_helloworld_int.vhd
  9. 285
      programa_vga_rs232.vhd
  10. 57
      tb_vga1.vhd
  11. 75
      toplevel.vhd

570
assembly/programa_helloworld_int.vhd

@ -1,285 +1,285 @@
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity programa_helloworld_int is
port( address : in std_logic_vector(7 downto 0);
clk : in std_logic;
dout : out std_logic_vector(15 downto 0));
end;
architecture v1 of programa_helloworld_int is
constant ROM_WIDTH: INTEGER:= 16;
constant ROM_LENGTH: INTEGER:= 256;
subtype rom_word is std_logic_vector(ROM_WIDTH-1 downto 0);
type rom_table is array (0 to ROM_LENGTH-1) of rom_word;
constant rom: rom_table := rom_table'(
"1111000000000000",
"1101100000001111",
"0000011100000000",
"1100000111100000",
"0010000100000000",
"1101010000001001",
"1101100000011100",
"0010011100000001",
"1101000000000011",
"1111000000000001",
"0000011000001001",
"0011011000000001",
"1101010100001011",
"0000011000001001",
"1101000000001011",
"1000001011111111",
"0000101010000000",
"1101010100001111",
"1101100000110000",
"0000001100001001",
"1101100000101001",
"1010001000001110",
"1000000011111111",
"0000100010000000",
"0101001000000000",
"0011001100000001",
"1101010100010100",
"1001000000000000",
"0000000000000000",
"1000100011111111",
"1101100000101001",
"0000001100001000",
"1000100111111111",
"1101100000101001",
"1010000100001110",
"0011001100000001",
"1101010100100000",
"0000000011111111",
"1000100011111111",
"1101100000101001",
"1001000000000000",
"0000010000000011",
"0000010100100010",
"0011010100000001",
"1101010100101011",
"0011010000000001",
"1101010100101010",
"1001000000000000",
"0000010000000011",
"0000010100010000",
"0011010100000001",
"1101010100110010",
"0011010000000001",
"1101010100110001",
"1001000000000000",
"1111000000000000",
"1101100000001111",
"0100000101000000",
"1101100000011100",
"0010011000110000",
"0100000111000000",
"1101100000011100",
"1011000000000001",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"1101000000110111");
begin
process (clk)
begin
if clk'event and clk = '1' then
dout <= rom(conv_integer(address));
end if;
end process;
end v1;
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity programa_helloworld_int is
port( address : in std_logic_vector(7 downto 0);
clk : in std_logic;
dout : out std_logic_vector(15 downto 0));
end;
architecture v1 of programa_helloworld_int is
constant ROM_WIDTH: INTEGER:= 16;
constant ROM_LENGTH: INTEGER:= 256;
subtype rom_word is std_logic_vector(ROM_WIDTH-1 downto 0);
type rom_table is array (0 to ROM_LENGTH-1) of rom_word;
constant rom: rom_table := rom_table'(
"1111000000000000",
"1101100000001111",
"0000011100000000",
"1100000111100000",
"0010000100000000",
"1101010000001001",
"1101100000011100",
"0010011100000001",
"1101000000000011",
"1111000000000001",
"0000011000001001",
"0011011000000001",
"1101010100001011",
"0000011000001001",
"1101000000001011",
"1000001011111111",
"0000101010000000",
"1101010100001111",
"1101100000110000",
"0000001100001001",
"1101100000101001",
"1010001000001110",
"1000000011111111",
"0000100010000000",
"0101001000000000",
"0011001100000001",
"1101010100010100",
"1001000000000000",
"0000000000000000",
"1000100011111111",
"1101100000101001",
"0000001100001000",
"1000100111111111",
"1101100000101001",
"1010000100001110",
"0011001100000001",
"1101010100100000",
"0000000011111111",
"1000100011111111",
"1101100000101001",
"1001000000000000",
"0000010000000011",
"0000010100100010",
"0011010100000001",
"1101010100101011",
"0011010000000001",
"1101010100101010",
"1001000000000000",
"0000010000000011",
"0000010100010000",
"0011010100000001",
"1101010100110010",
"0011010000000001",
"1101010100110001",
"1001000000000000",
"1111000000000000",
"1101100000001111",
"0100000101000000",
"1000100111111110",
"1101100000011100",
"1011000000000001",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"1101000000110111");
begin
process (clk)
begin
if clk'event and clk = '1' then
dout <= rom(conv_integer(address));
end if;
end process;
end v1;

5
assembly/programa_vga_rs232.asm

@ -97,8 +97,9 @@ espera3: SUB cont2, 01
interrup: DISABLE INTERRUPT
CALL recibe
LOAD txreg,rxreg
OUTPUT txreg, vga ; Mandamos el valor del teclado al VGA
CALL transmite ; echo rs232?
OUTPUT rxreg, vga ; Mandamos el valor del teclado al VGA
;CALL transmite ; echo rs232?
RETURNI ENABLE
ADDRESS FF
JUMP interrup

2
fuseRelaunch.cmd

@ -1 +1 @@
-intstyle "ise" -incremental -o "/home/hal/Dev/picoblaze-lab/tb_vga1_isim_beh.exe" -prj "/home/hal/Dev/picoblaze-lab/tb_vga1_beh.prj" "work.tb_vga1"
-intstyle "ise" -incremental -o "/home/rani/Desktop/git/picoblaze-lab/tb_vga1_isim_beh.exe" -prj "/home/rani/Desktop/git/picoblaze-lab/tb_vga1_beh.prj" "work.tb_vga1"

20
netgen/synthesis/toplevel_synthesis.nlf

@ -0,0 +1,20 @@
Release 14.7 - netgen P.20131013 (lin64)
Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
Command Line: netgen -intstyle ise -ar Structure -tm toplevel -w -dir
netgen/synthesis -ofmt vhdl -sim toplevel.ngc toplevel_synthesis.vhd
Reading design 'toplevel.ngc' ...
Flattening design ...
Processing design ...
Preping design's networks ...
Preping design's macros ...
Writing VHDL netlist
'/home/rani/Desktop/git/picoblaze-lab/netgen/synthesis/toplevel_synthesis.vhd'
...
INFO:NetListWriters:635 - The generated VHDL netlist contains Xilinx UNISIM
simulation primitives and has to be used with UNISIM library for correct
compilation and simulation.
Number of warnings: 0
Number of info messages: 1
Total memory usage is 303384 kilobytes

7576
netgen/synthesis/toplevel_synthesis.vhd

File diff suppressed because it is too large

97
pico.wcfg

@ -0,0 +1,97 @@
<?xml version="1.0" encoding="UTF-8"?>
<wave_config>
<wave_state>
</wave_state>
<db_ref_list>
<db_ref path="/home/rani/Desktop/git/picoblaze-lab/tb_vga1_isim_beh.wdb" id="1" type="auto">
<top_modules>
<top_module name="fontrom" />
<top_module name="numeric_std" />
<top_module name="std_logic_1164" />
<top_module name="std_logic_arith" />
<top_module name="std_logic_textio" />
<top_module name="std_logic_unsigned" />
<top_module name="tb_vga1" />
<top_module name="textio" />
<top_module name="vcomponents" />
</top_modules>
</db_ref>
</db_ref_list>
<WVObjectSize size="19" />
<wvobject fp_name="/tb_vga1/reset" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">reset</obj_property>
<obj_property name="ObjectShortName">reset</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/clk" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">clk</obj_property>
<obj_property name="ObjectShortName">clk</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/rx" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">rx</obj_property>
<obj_property name="ObjectShortName">rx</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/port_id" type="array" db_ref_id="1">
<obj_property name="ElementShortName">port_id[7:0]</obj_property>
<obj_property name="ObjectShortName">port_id[7:0]</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/write_strobe" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">write_strobe</obj_property>
<obj_property name="ObjectShortName">write_strobe</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/read_strobe" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">read_strobe</obj_property>
<obj_property name="ObjectShortName">read_strobe</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/out_port" type="array" db_ref_id="1">
<obj_property name="ElementShortName">out_port[7:0]</obj_property>
<obj_property name="ObjectShortName">out_port[7:0]</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/in_port" type="array" db_ref_id="1">
<obj_property name="ElementShortName">in_port[7:0]</obj_property>
<obj_property name="ObjectShortName">in_port[7:0]</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/tx" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">tx</obj_property>
<obj_property name="ObjectShortName">tx</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/led" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">led</obj_property>
<obj_property name="ObjectShortName">led</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/r" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">r</obj_property>
<obj_property name="ObjectShortName">r</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/g" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">g</obj_property>
<obj_property name="ObjectShortName">g</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/b" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">b</obj_property>
<obj_property name="ObjectShortName">b</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/h" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">h</obj_property>
<obj_property name="ObjectShortName">h</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/v" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">v</obj_property>
<obj_property name="ObjectShortName">v</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/clk_period" type="other" db_ref_id="1">
<obj_property name="ElementShortName">clk_period</obj_property>
<obj_property name="ObjectShortName">clk_period</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/uut/instruction" type="array" db_ref_id="1">
<obj_property name="ElementShortName">instruction[15:0]</obj_property>
<obj_property name="ObjectShortName">instruction[15:0]</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/uut/readstrobe" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">readstrobe</obj_property>
<obj_property name="ObjectShortName">readstrobe</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/uut/writestrobe" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">writestrobe</obj_property>
<obj_property name="ObjectShortName">writestrobe</obj_property>
</wvobject>
</wave_config>

8
picoblaze.xise

@ -86,10 +86,6 @@
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="18"/>
<association xil_pn:name="Implementation" xil_pn:seqID="18"/>
</file>
<file xil_pn:name="programa_helloworld_int.vhd" xil_pn:type="FILE_VHDL">
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="15"/>
<association xil_pn:name="Implementation" xil_pn:seqID="15"/>
</file>
<file xil_pn:name="tb_vga1.vhd" xil_pn:type="FILE_VHDL">
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="20"/>
<association xil_pn:name="PostMapSimulation" xil_pn:seqID="44"/>
@ -100,6 +96,10 @@
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="17"/>
<association xil_pn:name="Implementation" xil_pn:seqID="17"/>
</file>
<file xil_pn:name="programa_helloworld_int.vhd" xil_pn:type="FILE_VHDL">
<association xil_pn:name="BehavioralSimulation" xil_pn:seqID="15"/>
<association xil_pn:name="Implementation" xil_pn:seqID="15"/>
</file>
</files>
<properties>

570
programa_helloworld_int.vhd

@ -1,285 +1,285 @@
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity programa_helloworld_int is
port( address : in std_logic_vector(7 downto 0);
clk : in std_logic;
dout : out std_logic_vector(15 downto 0));
end;
architecture v1 of programa_helloworld_int is
constant ROM_WIDTH: INTEGER:= 16;
constant ROM_LENGTH: INTEGER:= 256;
subtype rom_word is std_logic_vector(ROM_WIDTH-1 downto 0);
type rom_table is array (0 to ROM_LENGTH-1) of rom_word;
constant rom: rom_table := rom_table'(
"1111000000000000",
"1101100000001111",
"0000011100000000",
"1100000111100000",
"0010000100000000",
"1101010000001001",
"1101100000011100",
"0010011100000001",
"1101000000000011",
"1111000000000001",
"0000011000001001",
"0011011000000001",
"1101010100001011",
"0000011000001001",
"1101000000001011",
"1000001011111111",
"0000101010000000",
"1101010100001111",
"1101100000110000",
"0000001100001001",
"1101100000101001",
"1010001000001110",
"1000000011111111",
"0000100010000000",
"0101001000000000",
"0011001100000001",
"1101010100010100",
"1001000000000000",
"0000000000000000",
"1000100011111111",
"1101100000101001",
"0000001100001000",
"1000100111111111",
"1101100000101001",
"1010000100001110",
"0011001100000001",
"1101010100100000",
"0000000011111111",
"1000100011111111",
"1101100000101001",
"1001000000000000",
"0000010000000011",
"0000010100100010",
"0011010100000001",
"1101010100101011",
"0011010000000001",
"1101010100101010",
"1001000000000000",
"0000010000000011",
"0000010100010000",
"0011010100000001",
"1101010100110010",
"0011010000000001",
"1101010100110001",
"1001000000000000",
"1111000000000000",
"1101100000001111",
"0100000101000000",
"1101100000011100",
"0010011000110000",
"0100000111000000",
"1101100000011100",
"1011000000000001",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
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"0000000000000000",
"0000000000000000",
"0000000000000000",
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"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
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"0000000000000000",
"0000000000000000",
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"0000000000000000",
"0000000000000000",
"0000000000000000",
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"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
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"0000000000000000",
"0000000000000000",
"0000000000000000",
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"0000000000000000",
"0000000000000000",
"0000000000000000",
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"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"1101000000110111");
begin
process (clk)
begin
if clk'event and clk = '1' then
dout <= rom(conv_integer(address));
end if;
end process;
end v1;
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity programa_helloworld_int is
port( address : in std_logic_vector(7 downto 0);
clk : in std_logic;
dout : out std_logic_vector(15 downto 0));
end;
architecture v1 of programa_helloworld_int is
constant ROM_WIDTH: INTEGER:= 16;
constant ROM_LENGTH: INTEGER:= 256;
subtype rom_word is std_logic_vector(ROM_WIDTH-1 downto 0);
type rom_table is array (0 to ROM_LENGTH-1) of rom_word;
constant rom: rom_table := rom_table'(
"1111000000000000",
"1101100000001111",
"0000011100000000",
"1100000111100000",
"0010000100000000",
"1101010000001001",
"1101100000011100",
"0010011100000001",
"1101000000000011",
"1111000000000001",
"0000011000001001",
"0011011000000001",
"1101010100001011",
"0000011000001001",
"1101000000001011",
"1000001011111111",
"0000101010000000",
"1101010100001111",
"1101100000110000",
"0000001100001001",
"1101100000101001",
"1010001000001110",
"1000000011111111",
"0000100010000000",
"0101001000000000",
"0011001100000001",
"1101010100010100",
"1001000000000000",
"0000000000000000",
"1000100011111111",
"1101100000101001",
"0000001100001000",
"1000100111111111",
"1101100000101001",
"1010000100001110",
"0011001100000001",
"1101010100100000",
"0000000011111111",
"1000100011111111",
"1101100000101001",
"1001000000000000",
"0000010000000011",
"0000010100100010",
"0011010100000001",
"1101010100101011",
"0011010000000001",
"1101010100101010",
"1001000000000000",
"0000010000000011",
"0000010100010000",
"0011010100000001",
"1101010100110010",
"0011010000000001",
"1101010100110001",
"1001000000000000",
"1111000000000000",
"1101100000001111",
"0100000101000000",
"1000100111111110",
"1101100000011100",
"1011000000000001",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"1101000000110111");
begin
process (clk)
begin
if clk'event and clk = '1' then
dout <= rom(conv_integer(address));
end if;
end process;
end v1;

285
programa_vga_rs232.vhd

@ -0,0 +1,285 @@
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity programa_vga_rs232 is
port( address : in std_logic_vector(7 downto 0);
clk : in std_logic;
dout : out std_logic_vector(15 downto 0));
end;
architecture v1 of programa_vga_rs232 is
constant ROM_WIDTH: INTEGER:= 16;
constant ROM_LENGTH: INTEGER:= 256;
subtype rom_word is std_logic_vector(ROM_WIDTH-1 downto 0);
type rom_table is array (0 to ROM_LENGTH-1) of rom_word;
constant rom: rom_table := rom_table'(
"1111000000000000",
"1101100000001111",
"0000011100000000",
"1100000111100000",
"0010000100000000",
"1101010000001001",
"1101100000011100",
"0010011100000001",
"1101000000000011",
"1111000000000001",
"0000011000001001",
"0011011000000001",
"1101010100001011",
"0000011000001001",
"1101000000001011",
"1000001011111111",
"0000101010000000",
"1101010100001111",
"1101100000110000",
"0000001100001001",
"1101100000101001",
"1010001000001110",
"1000000011111111",
"0000100010000000",
"0101001000000000",
"0011001100000001",
"1101010100010100",
"1001000000000000",
"0000000000000000",
"1000100011111111",
"1101100000101001",
"0000001100001000",
"1000100111111111",
"1101100000101001",
"1010000100001110",
"0011001100000001",
"1101010100100000",
"0000000011111111",
"1000100011111111",
"1101100000101001",
"1001000000000000",
"0000010000000011",
"0000010100100010",
"0011010100000001",
"1101010100101011",
"0011010000000001",
"1101010100101010",
"1001000000000000",
"0000010000000011",
"0000010100010000",
"0011010100000001",
"1101010100110010",
"0011010000000001",
"1101010100110001",
"1001000000000000",
"1111000000000000",
"1101100000001111",
"0100000101000000",
"1000101011111110",
"1011000000000001",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"0000000000000000",
"1101000000110111");
begin
process (clk)
begin
if clk'event and clk = '1' then
dout <= rom(conv_integer(address));
end if;
end process;
end v1;

57
tb_vga1.vhd

@ -105,6 +105,8 @@ BEGIN
H => H,
V => V
);
reset <= '1', '0' after 200 ns;
-- Clock process definitions
clk_process :process
@ -119,29 +121,78 @@ BEGIN
-- *** Test Bench - User Defined Section ***
tb : PROCESS
BEGIN
--OJO: para transmitir a 9600 bps poner 104.16 us
-- para transmitir a 115200 bps poner 8.68 us
rx <= '1'; --linea de recepcion inactiva
wait for 20 us;
rx <= '0'; --bit de inicio
wait for 8.68 us; --OJO: para transmitir a 9600 bps poner 104.16 us
-- para transmitir a 115200 bps poner 8.68 us
rx <= '1'; --enviamos una A (=0100.0001) --> Una A en ASCII
wait for 8.68 us;
-- enviamos una A (=0100.0001) --> Una A en ASCII
-- 2^0
rx <= '1';
wait for 8.68 us;
-- 2^1
rx <= '0';
wait for 8.68 us;
-- 2^2
rx <= '0';
wait for 8.68 us;
-- 2^3
rx <= '0';
wait for 8.68 us;
-- 2^4
rx <= '0';
wait for 8.68 us;
-- 2^5
rx <= '0';
wait for 8.68 us;
-- 2^6
rx <= '1';
wait for 8.68 us;
-- 2^7
rx <= '0';
wait for 8.68 us;
rx <= '1'; --bit de parada
wait for 8.68 us;
----------------------------
wait for 15 us;
-- Mandamos otro caracter
rx <= '1'; --linea de recepcion inactiva
wait for 20 us;
rx <= '0'; --bit de inicio
wait for 8.68 us;
-- enviamos una w (=0111 0111) --> Una w en ASCII
-- 2^0
rx <= '1';
wait for 8.68 us;
-- 2^1
rx <= '1';
wait for 8.68 us;
-- 2^2
rx <= '1';
wait for 8.68 us;
-- 2^3
rx <= '0';
wait for 8.68 us;
-- 2^4
rx <= '1';
wait for 8.68 us;
-- 2^5
rx <= '1';
wait for 8.68 us;
-- 2^6
rx <= '1';
wait for 8.68 us;
-- 2^7
rx <= '0';
wait for 8.68 us;
rx <= '1'; --bit de parada
wait for 8.68 us;
rx <= '1';
wait; -- will wait forever
END PROCESS;

75
toplevel.vhd

@ -110,6 +110,9 @@ signal cube_y_max : integer := 260;
-- fontROM signals
constant font_ROM : font_rom_type := ROM;
-- Signal vga register
--signal vga_reg :std_logic_vector(7 downto 0) := "00000000";
-- Aadimos el controlador de VGA
component controllerVGA
port (
@ -194,11 +197,50 @@ begin
if xCount < border_width * 8 OR xCount > 639 - (border_width * 8) OR
yCount < (border_width * 8) OR yCount > 479 - (border_width * 8) then
RGB := BLUE;
elsif (xCount < 500) then
RGB := WHITE;
else
RGB := YELLOW;
end if;
elsif(writestrobe = '1' AND portid=x"FE") then
case outport is
when x"64" =>
-- Recibimos ascii d
-- Movemos derecha?
cube_x_min <= cube_x_min+1;
cube_x_max <= cube_x_max+1;
cube_y_min <= cube_y_min;
cube_y_max <= cube_y_max;
when x"61" =>
-- Recibimos ascii a
-- Movemos izquierda?
cube_x_min <= cube_x_min-1;
cube_x_max <= cube_x_max-1;
cube_y_min <= cube_y_min;
cube_y_max <= cube_y_max;
when x"77" =>
-- Recibimos ascii w
-- Movemos arriba?
cube_x_min <= cube_x_min;
cube_x_max <= cube_x_max;
cube_y_min <= cube_y_min-1;
cube_y_max <= cube_y_max-1;
when x"73" =>
-- Recibimos ascii s
-- Movemos abajo?
cube_x_min <= cube_x_min;
cube_x_max <= cube_x_max;
cube_y_min <= cube_y_min+1;
cube_y_max <= cube_y_max+1;
when others =>
cube_x_min <= cube_x_min;
cube_x_max <= cube_x_max;
cube_y_min <= cube_y_min;
cube_y_max <= cube_y_max;
end case;
end if;
if(xCount>=cube_x_min AND xCount<cube_x_max AND
yCount>=cube_y_min AND yCount<cube_y_max) then
RGB := GREEN;
else
RGB := RED;
end if;
-- Sacamos los colores por los puertos de la FPGA
R <= RGB(2);
@ -237,6 +279,18 @@ begin
end if;
end process;
-- Registro VGA.