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assembly functionality. UCF fixed, place and route OK. Other fixes

master
Enrique Fernandez 3 years ago
parent
commit
0f8e0c54bf
  1. 2
      .gitignore
  2. 14
      assembly/programa_helloworld_int.asm
  3. 104
      assembly/programa_vga_rs232.asm
  4. 40
      controllerVGA.vhd
  5. 22
      projectVGA.ucf
  6. 156
      toplevel.vhd
  7. 104
      vga.wcfg

2
.gitignore

@ -1,5 +1,7 @@
## shit isim
isim/
*.wdb
write.txt
## compiler picoblaze shit
*.bin

14
assembly/programa_helloworld_int.asm

@ -7,7 +7,8 @@
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;declaracion de constantes y variables
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
CONSTANT vga, FE
CONSTANT rs232, FF ; puerto comunicacion serie es el FF
; rx es el bit 0 del puerto FF(entrada)
; tx es el bit 7 del puerto FF(salida), esto es porque
@ -140,16 +141,13 @@ espera3: SUB cont2, 01
; FIN
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; RUTINA DE ATENCION A LA INTERRUPCIÓN
; RUTINA DE ATENCION A LA INTERRUPCION
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
interrup: DISABLE INTERRUPT
CALL recibe
LOAD txreg,rxreg
CALL transmite
ADD S6,30
LOAD txreg,S6
CALL transmite
LOAD txreg,rxreg
OUTPUT txreg, vga ; Mandamos el valor del teclado al VGA
CALL transmite ; echo rs232?
RETURNI ENABLE
ADDRESS FF
JUMP interrup

104
assembly/programa_vga_rs232.asm

@ -0,0 +1,104 @@
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;
;Transmision RS-232 por software.
;115200bps, 8 data bits, no parity, 1 stop bit, no flow control,
;part1: transmite por el puerte serie el contenido de la memoria RAM (64 bytes,portid[0-63])
;part2: genera numeros pseudo-aleatorios, bucle contador+interrupcion para transmitir numero.
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;declaracion de constantes y variables
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
CONSTANT vga, FE
CONSTANT rs232, FF ; puerto comunicacion serie es el FF
; rx es el bit 0 del puerto FF(entrada)
; tx es el bit 7 del puerto FF(salida)
NAMEREG s1, txreg ;buffer de transmision
NAMEREG s2, rxreg ;buffer de recepcion
NAMEREG s3, contbit ;contador de los 8 bits de datos
NAMEREG s4, cont1 ;contador de retardo1
NAMEREG s5, cont2 ;contador de retardo2
;
ADDRESS 00 ;el programa se cargara a partir de la dir 00
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;Inicio del programa
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
DISABLE INTERRUPT
start: CALL recibe
;Instrucciones para la parte1
LOAD S7,00
parte1: INPUT txreg,S7
ADD txreg,00
JUMP Z parte2
CALL transmite
ADD S7,01
JUMP parte1
;Instrucciones para la parte2
parte2: ENABLE INTERRUPT
bucle1: LOAD S6,09
bucle2: SUB S6,01
JUMP NZ bucle2
LOAD S6,09
JUMP bucle2
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;Rutina de recepcion de caracteres
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
recibe: ;esperamos a que se reciba un bit de inicio
INPUT rxreg, rs232
AND rxreg, 80
JUMP NZ, recibe
CALL wait_05bit
;almacenamos los 8 bits de datos
LOAD contbit,09
next_rx_bit: CALL wait_1bit
SR0 rxreg
INPUT s0, rs232
AND s0, 80
OR rxreg, s0
SUB contbit, 01
JUMP NZ, next_rx_bit
RETURN
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;Rutina de transmision de caracteres
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
transmite: ;enviamos un bit de inicio
LOAD s0, 00
OUTPUT s0, rs232
CALL wait_1bit
;enviamos los 8 bits de datos
LOAD contbit, 08
next_tx_bit: OUTPUT txreg, rs232
CALL wait_1bit
SR0 txreg
SUB contbit, 01
JUMP NZ, next_tx_bit
;enviamos un bit de parada
LOAD s0, FF
OUTPUT s0, rs232
CALL wait_1bit
RETURN
wait_1bit: LOAD cont1, 03
espera2: LOAD cont2, 22
espera1: SUB cont2, 01
JUMP NZ, espera1
SUB cont1, 01
JUMP NZ, espera2
RETURN
wait_05bit: LOAD cont1, 03
espera4: LOAD cont2, 10
espera3: SUB cont2, 01
JUMP NZ, espera3
SUB cont1, 01
JUMP NZ, espera4
RETURN
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
; RUTINA DE ATENCION A LA INTERRUPCION
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
interrup: DISABLE INTERRUPT
CALL recibe
LOAD txreg,rxreg
OUTPUT txreg, vga ; Mandamos el valor del teclado al VGA
CALL transmite ; echo rs232?
RETURNI ENABLE
ADDRESS FF
JUMP interrup

40
controllerVGA.vhd

@ -18,16 +18,16 @@ architecture controllerVGA of controllerVGA is
constant h_displayArea : integer := 640;
constant h_limit : integer := 800;
constant h_frontPorch : integer := 16;
constant h_backPorch : integer := 48;
constant h_backPorch : integer := 47; -- default 48. Parece que funciona bien.
constant h_syncPulse : integer := 96;
constant v_displayArea : integer := 480;
constant v_limit : integer := 525;
constant v_frontPorch : integer := 10; -- default 10
constant v_backPorch : integer := 33; -- default 33
constant v_limit : integer := 521;
constant v_frontPorch : integer := 10; -- default 10
constant v_backPorch : integer := 28; -- default 33. Con 28 parece que funciona OK
constant v_syncPulse : integer := 2;
signal s_clk_25 : std_logic := '0'; -- Empieza en 0.
signal s_clk_25 : std_logic := '0';
-- Max valor será 800 (h_limit) 800 -> 1100100000
signal h_currentPos : std_logic_vector(9 downto 0) := (others=> '0');
@ -55,16 +55,16 @@ begin
sync: process(s_clk_25)
begin
if(rising_edge(s_clk_25)) then
if h_currentPos < h_limit - 1 then
if h_currentPos < h_limit-1 then
-- Aumentamos el contador Horizontal.
h_currentPos <= h_currentPos + 1;
h_currentPos <= h_currentPos+1;
-- Primero hacemos una linea horizontal, y despues aumentamos
-- una vertical
else
if v_currentPos < v_limit - 1 then
if v_currentPos < v_limit-1 then
-- Aumentamos el contador Vertical.
v_currentPos <= v_currentPos + 1;
v_currentPos <= v_currentPos+1;
else
v_currentPos <= (others => '0');
end if;
@ -76,31 +76,25 @@ begin
end process;
-- Sincronizacion Horizontal
hsync <= '0' when h_currentPos < h_syncPulse
else '1';
hsync <= '0' when h_currentPos < h_syncPulse else '1';
-- Sincronizacion Vertical
vsync <= '0' when v_currentPos < v_syncPulse
else '1';
vsync <= '0' when v_currentPos < v_syncPulse else '1';
-- Ready signals
h_ready <= '1' when (h_currentPos >= h_syncPulse + h_backPorch) AND
(h_currentPos < h_syncPulse + h_backPorch + h_displayArea)
else '0';
h_ready <= '1' when (h_currentPos >= h_syncPulse+h_backPorch) AND
(h_currentPos < h_syncPulse+h_backPorch+h_displayArea) else '0';
v_ready <= '1' when (v_currentPos >= v_syncPulse + v_backPorch) AND
(v_currentPos < v_syncPulse + v_backPorch + v_displayArea)
else '0';
v_ready <= '1' when (v_currentPos >= v_syncPulse+v_backPorch) AND
(v_currentPos < v_syncPulse+v_backPorch+v_displayArea) else '0';
ready <= h_ready AND v_ready;
-- Cuenta de pixeles del area visible
countX <= h_currentPos - h_syncPulse - h_backPorch when h_ready = '1'
else (others => '0');
countX <= h_currentPos-h_syncPulse-h_backPorch when h_ready = '1' else (others => '0');
x <= countX;
countY <= v_currentPos - v_syncPulse - v_backPorch when v_ready = '1'
else (others => '0');
countY <= v_currentPos-v_syncPulse-v_backPorch when v_ready = '1' else (others => '0');
y <= countY;
end architecture;

22
projectVGA.ucf

@ -4,6 +4,10 @@
## Mapeo de puertos de salida para el proyecto de la P2.
## ==== Pushbuttons (BTN) ====
# Boton derecha
#NET "reset" LOC = "K17" | IOSTANDARD = LVTTL | PULLDOWN ;
## ==== Clock inputs (CLK) ====
NET "clk" LOC = "C9" | IOSTANDARD = LVCMOS33 ;
# Define clock period for 50 MHz oscillator (40%/60% duty-cycle)
@ -16,13 +20,13 @@ NET "LED" LOC = "F12" | IOSTANDARD = LVTTL | SLEW = SLOW | DRIVE = 8 ;
NET "rx" LOC = "R7" | IOSTANDARD = LVTTL ;
NET "tx" LOC = "M14" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = SLOW ;
## ==== Pushbuttons (BTN) ====
# Boton derecha
NET "reset" LOC = "K17" | IOSTANDARD = LVTTL | PULLDOWN ;
## === Switchs ===
# Switch 1. (no iba el boton para el reset)
NET "reset" LOC = "L13" | IOSTANDARD = LVTTL | PULLUP ;
## ==== VGA Port (VGA) ====
NET "R" LOC = "H14" ;
NET "G" LOC = "H15" ;
NET "B" LOC = "G15" ;
NET "H" LOC = "F15" ;
NET "V" LOC = "F14" ;
# ==== VGA Port (VGA) ====
NET "B" LOC = "G15" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;
NET "G" LOC = "H15" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;
NET "H" LOC = "F15" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;
NET "R" LOC = "H14" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;
NET "V" LOC = "F14" | IOSTANDARD = LVTTL | DRIVE = 8 | SLEW = FAST ;

156
toplevel.vhd

@ -86,31 +86,27 @@ signal xCount, yCount : integer;
-- TODO: ROM VGA
type vga_rom_type is array (0 to 7) of std_logic_vector(0 to 7);
-- Definition
constant BALL_ROM : vga_rom_type :=
(
"00111100", -- ****
"01111110", -- ******
"01111110", -- ********
"11111111", -- ********
"11111111", -- ********
"11111111", -- ********
"11111111", -- ********
"01111110", -- ********
"01111110", -- ******
"00111100" -- ****
);
-- Extra signals
constant BALL_SIZE: integer:=8; -- 8
constant maxX : integer := 100;
constant maxY : integer := 10;
-- ball left, right boundary
signal ball_x_l, ball_x_r: unsigned(9 downto 0);
-- ball top, bottom boundary
signal ball_y_t, ball_y_b: unsigned(9 downto 0);
signal rom_addr, rom_col: integer := 0;
signal rom_data: std_logic_vector(0 to 7);
signal rom_bit: std_logic;
-- cubo que se mueve por teclado
signal cube_x_min : integer := 300;
signal cube_x_max : integer := 340;
signal cube_y_min : integer := 220;
signal cube_y_max : integer := 260;
-- Añadimos el controlador de VGA
component controllerVGA
port (
@ -152,8 +148,7 @@ begin
port map( address => address,
dout => instruction,
clk => clk);
vga:controllerVGA
port map( clk => clk,
clk_25 => clk_25,
@ -168,66 +163,80 @@ begin
yCount <= to_integer(unsigned(y));
-- TODO: Proceso controlador del VGA. SIN COMPROBAR!!!
process(clk_25)
process(clk_25,reset)
-- Variable para los colores. CARGA INSTANTANEA DEL VALOR, SOLO PARA USO TEMPORAL!!
variable RGB : std_logic_vector(2 downto 0) := (others => '0');
begin
if rising_edge(clk_25) then
if reset = '1' then
if reset = '1' then
RGB := (others => '0');
elsif rising_edge(clk_25) then
-- Si estamos dentro del rango de display y la pantalla esta lista para sacar cosas
if (ready = '1' AND xCount < 640 AND yCount < 480) then
-- ## LO QUE EJECUTAMOS EN CADA FRAME ## --
-- Default color como black
RGB := (others => '0');
else
-- Si estamos dentro del rango de display
if (xCount < 640 AND yCount < 480) then
-- ## LO QUE EJECUTAMOS EN CADA FRAME ## --
-- Default color como black
RGB := (others => '0');
-- Dibujamos un borde de 2px en LEFT
if xCount >= 0 AND xCount < 2 then
RGB := "1" & "1" & "0";
-- Dibujamos un borde de 2px en RIGHT
elsif xCount <= 639 AND xCount > 635 then
RGB := "1" & "1" & "0";
end if;
-- Dibujamos un borde de 2px en LEFT
if xCount >= 0 AND xCount < 2 then
RGB := "1" & "1" & "0";
-- Dibujamos un borde de 2px en RIGHT
elsif xCount <= 639 AND xCount > 637 then
RGB := "1" & "1" & "0";
end if;
-- Dibujamos borde de 2px en TOP
if yCount >=0 AND yCount < 2 then
RGB := "1" & "1" & "0";
-- Dibujamos borde de 2px en BOT
elsif yCount <= 479 AND yCount > 475 then
RGB := "1" & "1" & "0";
end if;
-- Dibujamos borde de 2px en TOP
if yCount >=0 AND yCount < 2 then
RGB := "1" & "1" & "0";
-- Dibujamos borde de 2px en BOT
elsif yCount <= 479 AND yCount > 477 then
RGB := "1" & "1" & "0";
end if;
-- Por si queremos dibujar más mierda va aqui
-- SPRITE ROM
if(xCount >= 100 AND xCount < 108 AND yCount >= 10 AND yCount < 18) then
-- Estamos dentro del area de nuestro sprite.
-- Leemos de la ROM
rom_col <= xCount - 100;
rom_addr <= yCount - 10;
rom_data <= BALL_ROM(rom_addr);
rom_bit <= rom_data(rom_col);
if rom_bit = '1' then
RGB := "1" & "1" & "1"; -- Blanco
else
RGB := "0" & "0" & "0"; -- Negro
end if;
-- if rom_addr = 7 then
-- rom_addr <= "000";
-- rom_col <= rom_col + 1;
-- else
-- rom_addr <= rom_addr + 1;
-- end if;
-- if rom_col = 7 then
-- rom_col <= "000";
-- end if;
end if;
-- Por si queremos dibujar más mierda va aqui
if(writestrobe = '1' AND portid=x"FE") then
case outport is
when x"64" =>
-- Recibimos ascii d
-- Movemos derecha?
cube_x_min <= cube_x_min+1;
cube_x_max <= cube_x_max+1;
cube_y_min <= cube_y_min;
cube_y_max <= cube_y_max;
when x"61" =>
-- Recibimos ascii a
-- Movemos izquierda?
cube_x_min <= cube_x_min-1;
cube_x_max <= cube_x_max-1;
cube_y_min <= cube_y_min;
cube_y_max <= cube_y_max;
when x"77" =>
-- Recibimos ascii w
-- Movemos arriba?
cube_x_min <= cube_x_min;
cube_x_max <= cube_x_max;
cube_y_min <= cube_y_min-1;
cube_y_max <= cube_y_max-1;
when x"73" =>
-- Recibimos ascii s
-- Movemos abajo?
cube_x_min <= cube_x_min;
cube_x_max <= cube_x_max;
cube_y_min <= cube_y_min+1;
cube_y_max <= cube_y_max+1;
when others =>
cube_x_min <= cube_x_min;
cube_x_max <= cube_x_max;
cube_y_min <= cube_y_min;
cube_y_max <= cube_y_max;
end case;
end if;
if(xCount>=cube_x_min AND xCount<cube_x_max AND
yCount>=cube_y_min AND yCount<cube_y_max) then
RGB := "0" & "1" & "1";
end if;
-- Prueba de todos los colores. Rayas de 2px de arriba a abajo.
-- if xCount >= 310 AND xCount < 312 then
-- RGB := "0" & "0" & "1";
@ -255,14 +264,9 @@ begin
-- ## FIN DE LO QUE EJECUTAMOS EN CADA FRAME ## --
-- Sacamos los colores por los puertos de la FPGA
R <= RGB(2);
G <= RGB(1);
B <= RGB(0);
else
R <= '0';
G <= '0';
B <= '0';
end if;
R <= RGB(2);
G <= RGB(1);
B <= RGB(0);
end if;
end if;
end process;
@ -297,7 +301,7 @@ begin
process(clk)
begin
if(clk'event and clk = '1') then
if(writestrobe = '1' and portid<x"63") then
if(writestrobe = '1' and portid<x"40") then
RAM(to_integer(unsigned(portid))) <= outport;
end if;
end if;
@ -305,7 +309,7 @@ begin
RAM_out <= RAM(to_integer(unsigned(portid)));
-- Multiplexor inport
inport <= RAM_out when (readstrobe = '1' and portid<x"63") else
inport <= RAM_out when (readstrobe = '1' and portid<x"40") else
rxbuff_out when (readstrobe = '1' and portid=x"FF") else
x"00";

104
vga.wcfg

@ -0,0 +1,104 @@
<?xml version="1.0" encoding="UTF-8"?>
<wave_config>
<wave_state>
</wave_state>
<db_ref_list>
<db_ref path="/home/rani/Desktop/git/picoblaze-lab/tb_vga1_isim_beh.wdb" id="1" type="auto">
<top_modules>
<top_module name="numeric_std" />
<top_module name="std_logic_1164" />
<top_module name="std_logic_arith" />
<top_module name="std_logic_textio" />
<top_module name="std_logic_unsigned" />
<top_module name="tb_vga1" />
<top_module name="textio" />
<top_module name="vcomponents" />
</top_modules>
</db_ref>
</db_ref_list>
<WVObjectSize size="21" />
<wvobject fp_name="/tb_vga1/reset" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">reset</obj_property>
<obj_property name="ObjectShortName">reset</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/clk" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">clk</obj_property>
<obj_property name="ObjectShortName">clk</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/rx" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">rx</obj_property>
<obj_property name="ObjectShortName">rx</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/port_id" type="array" db_ref_id="1">
<obj_property name="ElementShortName">port_id[7:0]</obj_property>
<obj_property name="ObjectShortName">port_id[7:0]</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/write_strobe" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">write_strobe</obj_property>
<obj_property name="ObjectShortName">write_strobe</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/read_strobe" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">read_strobe</obj_property>
<obj_property name="ObjectShortName">read_strobe</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/out_port" type="array" db_ref_id="1">
<obj_property name="ElementShortName">out_port[7:0]</obj_property>
<obj_property name="ObjectShortName">out_port[7:0]</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/in_port" type="array" db_ref_id="1">
<obj_property name="ElementShortName">in_port[7:0]</obj_property>
<obj_property name="ObjectShortName">in_port[7:0]</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/tx" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">tx</obj_property>
<obj_property name="ObjectShortName">tx</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/led" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">led</obj_property>
<obj_property name="ObjectShortName">led</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/r" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">r</obj_property>
<obj_property name="ObjectShortName">r</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/g" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">g</obj_property>
<obj_property name="ObjectShortName">g</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/b" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">b</obj_property>
<obj_property name="ObjectShortName">b</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/h" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">h</obj_property>
<obj_property name="ObjectShortName">h</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/v" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">v</obj_property>
<obj_property name="ObjectShortName">v</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/clk_period" type="other" db_ref_id="1">
<obj_property name="ElementShortName">clk_period</obj_property>
<obj_property name="ObjectShortName">clk_period</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/uut/rom_addr" type="other" db_ref_id="1">
<obj_property name="ElementShortName">rom_addr</obj_property>
<obj_property name="ObjectShortName">rom_addr</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/uut/rom_col" type="other" db_ref_id="1">
<obj_property name="ElementShortName">rom_col</obj_property>
<obj_property name="ObjectShortName">rom_col</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/uut/xcount" type="other" db_ref_id="1">
<obj_property name="ElementShortName">xcount</obj_property>
<obj_property name="ObjectShortName">xcount</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/uut/ycount" type="other" db_ref_id="1">
<obj_property name="ElementShortName">ycount</obj_property>
<obj_property name="ObjectShortName">ycount</obj_property>
</wvobject>
<wvobject fp_name="/tb_vga1/uut/ready" type="logic" db_ref_id="1">
<obj_property name="ElementShortName">ready</obj_property>
<obj_property name="ObjectShortName">ready</obj_property>
</wvobject>
</wave_config>
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